Video BIOS

VBIOS is one of oldest functions utilized during OS boot. BIOS uses Int10 functions to set VBIOS functions. VBIOS is located at C0000-C7FFF.

VIDEO BIOS Functions

Video cards come with 80x86 commands burned in a ROM. Video BIOS is located at C0000-C7FFF and holds routines for handling basic functions. To execute a function in video BIOS ROM, call INT 10 with AX=sub-function. Video BIOS calls can also be used to place characters or pixels on the screen; but it MUCH SLOWER to use this method as compared to writing directly to video memory.

* INT 10h, Subfunction:
o AH=0,AL=2h: 80x25 Text
o AH=0,AL=13h: 320x200, 256-color graphic

Some-things about Graphics & Video BIOS

There are two type of graphics capabilities available for Computers. External graphics and integrated graphics.

Companies like Nvidia, ATI provide External graphics cards, that can be plugged into PCIe ports of computer. Or there is lower cost option with integrated graphics available with Chipsets (such as Intel 940GM) or latest processors with integrated graphics functions (such as Intel Sandybridge processors).

For External Graphics cards, Video BIOS is stored into a flash device on the graphics card. Function of BIOS is to “boot” the graphics card. So when system is powerd on, BIOS will set the graphics function on the card such as frequency, graphics functions etc. With new graphics cards graphics chips/ GPU manufacturers such as Nvidia, ATI, use flash (“reprogram”) same chip for selling in different market segments – changing frequency/ features.

For integrated graphics capability, Intel will provide a BIOS image to its vendors (Dells, Lenovo, HP, Acer/ ASUS etc). System manufacturer (PC maker) will integrate this BIOS code as part of their standard BIOS and this BIOS will be invoked during system boot.
Once system is booted, graphics drivers take over the graphics settings and can modify the graphics settings based on displays attached/ resolution/ etc.

Overclocking enthusiasts like to play with Graphics capabilities shipped with standard BIOS BIOS (frequency for graphics chip, memory speed, etc). These enthusiasts might be able to write utilities to over-ride drivers settings.

Nvidia Fermi GPGPU makes into 1U Servers from Supermicro & Appro

Due to high power requirements it has been extremely challenging to make a case for Tesla in 1U 19 inch rack-mount chassis. But both Supermicro & Appro have managed to fit Tesla GPUs. This is quiet an achievement as cooling is highly restricted in 1U form factor.

Appro has stuck 4 Nvidia GPUs in 1 U offering while using Intel’s older Xeon 5500 & 5600 chips. This goes back to imminent threat GPUs have posed to business model of CPU market, where CPUs controlled value of the platform. Appro 1U server is yet another example where you can live with cheaper CPUs in platform while delivering performance through GPGPUs. Code writers will definitely optimize performance away from CPU to GPGPUs in this case.

Supermicro’s solution is to stick 2 Tesla GPUs in 1 U offering while using AMD’s 12-core Opeteron 6100 series. Supermicro offers most of its 1U standard solutions with Intel’s quad-core & hexa-core processors. Supermicro has also announced 4U unit with 4 Tesla GPUs that has hot-swappable 1.4KW power supply units.

Use models: Target scientific research, natural resource exploration, financial simulation customers.

Overall I see these high performance niche solutions & would love to hear about any real buyers of this products! Both solutions offer extremely high performance but concerns will be around heat generation and cooling requirements in chassis. For Nvidia, they can keep some hopes alive for HPC oriented version on chip dubbed Tesla in 1U space.

Nvidia Fermi could change business of laptops

Industry has been wondering on when Nvidia will introduce DX11 solutions to laptops. NVIDIA haven't been particularly upfront about their mobile plans for the Fermi GPUs but, according to a premature product page from gaming notebook maker Eurocom, it looks like by June 2010 Nvidia Fermi based Laptops might be in market. Eurocom are listing an NVIDIA GeForce GTX 480M Fermi GPU with 2GB of GDDR5 memory (MXM 3.0b 256b interface) as arriving that month, a 40nm chipset that will add $380 to their 18.4-inch X8100 Leopard notebook. The notebook is powered by Intel PM55 chipset and by the fastest Intel i7 Mobile processor with Nvidia's GeForce GTX 280M, GTX 285M or GTX 480M running in single or SLI mode operation, or by the Quadro FX 2800M or Quadro FX 3800M GPUs. GTX480 is power hungry so GTX480 has to be streamlined for power, size, heat dissipation.

Historically Intel CPUs have dominated majority of computing devices. But recent GPU developments are clearly showing that value could shift from CPUs to GPUs. That is customers will pay more for peripheral components than CPUs. There is more evidence that GPUs could be big blow to mighty Intel, which doesn't have a discrete graphics solution in sight.

GPU based HPC Computational Systems

HPC applications are currently limited to Government, Research Labs, Universities & Industries such as Oil & Gas, Financial & Bioinformatics where computationally intense Apps are neeed. Some companies such as Appro offers latest CPUs & Nvidia Tesla GPU based solutions for HPC (High Performance Computing) deployment. Tesla us built on massively parallel NVIDIA CUDA architecture.

 

HPC machine such as Appro HyperPower delivers 78TF Single Precision or 6.56TF double precision GPU performance. Intel Xeon CPUs & Nvidia GPUs are used in HPC machines.

Upto 456CPUs or 18240 GPUs are used in a rack configuration.

To research Further:

* How much revenues Nvidia generates from Tesla / HPC product lines

Shaders for Multi-core processors

What are challenges for writing new code for a multi-core processor
What are challenges for converting existing shaders to multi-core processor

Transactional Memory

TM is software feature being researched for parallel programming.

For a multi-core computation environment, mutliple threads work on a shared memory space. Often have to deploy RMW where programmers use lock, mutex etc. For large number of parallel threads it becomes very hard for SW writers to keep track of locks. Its even harder to debug any concurrency issue that could result in deadlocks.

TM offers an atomic RMW operation without explicit need of lock for programmer.